AVALIAÇÃO E AUTOMAÇÃO DE TÉCNICAS DE OBFUSCAÇÃO PARA CIRCUITOS ASIC UTILIZANDO FERRAMENTAS EDA
Segurança em Hardware, Obfuscação Combinacional, Automação, EDA, Cadence, ASIC
The security of ASIC integrated circuits has gained increasing relevance due to the significant advances in threats related to reverse engineering and Hardware Trojan insertion, attacks that can cause economic losses and strategically compromise critical systems. This work specifically addresses the use of combinational obfuscation techniques, chosen for their simplicity of implementation and practical effectiveness as preventive methods against these attacks. The main proposal of the research is to critically evaluate existing techniques, aiming to select a simple, effective approach fully compatible with automation processes using Cadence's commercial EDA tools. Additionally, the research intends to develop TCL scripts to directly integrate the selected technique into the standard ASIC development flow, promoting greater ease and practical viability for industrial adoption. Currently, the study is in its initial phase, with no practical tests conducted or results obtained yet. The circuit used for validation will not necessarily be a traditional academic benchmark, being selected in the future based on specific criteria defined during the research. To guide this selection process, a clear set of validation criteria based on objective metrics such as performance, security, area, and power consumption will be established. It is expected that, upon completion, a practical and automated methodology will be proposed, capable of significantly increasing ASIC circuit security while maintaining low operational and manufacturing cost impacts.